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Vianney Lapotre 1 Purushotham Murugappa Velayuthan 2 Guy Gogniat 1 Amer Baghdadi 3, 2 Jean-Philippe Diguet 1 Jean-Noël Bazin 2 Hübner Michael 4
1 Lab-STICC_UBS_CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
3 Lab-STICC_TB_CACS_IAS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
Abstract : The multiplication of wireless standards is introducing the need of flexible multi-standard baseband receivers. A multi-ASIP approach for turbo decoding is an answer to reach high throughput and high flexibility. The increasing demand of throughput for new greedy application on mobile devices and the reduction of latency between two frames create the need of an efficient reconfiguration management of such multi-ASIP platforms. In this paper, we propose to tackle reconfiguration optimization of a multi-standard ASIP for turbo decoding developed during previous work. Results show that for an area overhead of 0.012 mm 2 in 65 nm CMOS technology, a significant reconfiguration time optimization is achieved thanks to a reduction of the ASIP configuration load of 70%. Moreover, in a multi-ASIP context in which 8 ASIPs are implemented the configuration load is divided by ten thanks to the possibility to use a multicast mechanism for ASIP configuration loading.
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https://hal.archives-ouvertes.fr/hal-00873979
Contributor : Bibliothèque Télécom Bretagne <>
Submitted on : Tuesday, March 9, 2021 - 2:40:26 PM
Last modification on : Monday, May 17, 2021 - 11:24:05 AM

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Vianney Lapotre, Purushotham Murugappa Velayuthan, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, et al.. No title. ISCAS 2013 : IEEE International Symposium on Circuits and Systems, May 2013, Beijing, Chine. pp.493 - 496, ⟨10.1109/ISCAS.2013.6571888⟩. ⟨hal-00873979⟩

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